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| Dual N-Channel JFET Switch CORPORATION U401 - U406 FEATURES ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified) Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 50V Gate Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC Operating Temperature Range . . . . . . . . . . . -55oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation (TA = 85oC) Derate above 25oC One Side 300mW 2.6mW/ oC Both Sides 500mW 5mW/ oC * Minimum System Error and Calibration * Low Drift With Temperature * Operates From Low Power Supply Voltages * High Output Impedance PIN CONFIGURATION TO-71 NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING INFORMATION Part U401-6 XU401-6 S2 D2 G1 D1 G2 S1 Package Hermetic TO-71 Sorted Chips in Carriers Temperature Range -55oC to +150oC -55oC to +150oC CJ2 U401 - U406 CORPORATION ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified) SYMBOL PARAMETER Gate-Source Breakdown Voltage Gate Reverse Current (Note 2) Gate-Source Cutoff Voltage Gate-Source Voltage (on) Saturation Drain Current (Note 3) Operating Gate Current (Note 2) Gate-Gate Breakdown Voltage Common-Source Forward Transconductance (Note 3) Common-Source Output Conductance Common-Source Forward Transconductance Common-Source Output Conductance Common-Source Input Capacitance (Note 6) Common-Source Reverse Transfer Capacitance (Note 6) Equivalent Short-Circuit Input Noise Voltage Common-Mode Rejection Ratio Differential Gate-Source Voltage Gate-Source Voltage Differential Drift (Note 4) 95 5 0.5 -.5 U401 MIN BVGSS IGSS VGS(off) VGS(on) IDSS IG -50 -25 -2.5 -2.3 10.0 -15 -10 0.5 -.5 MAX U402 MIN -50 -25 -2.5 -2.3 10.0 -15 -10 0.5 -.5 MAX U403 MIN -50 -25 -2.5 -2.3 10.0 -15 -10 0.5 -.5 MAX U404 MIN -50 -25 -2.5 -2.3 10.0 -15 -10 0.5 -.5 MAX U405 MIN -50 -25 -2.5 -2.3 10.0 -15 -10 0.5 -.5 MAX U406 MIN -50 -25 -2.5 V -2.3 10.0 -15 -10 mA pA nA V VDG = 15V, ID = 200A VDS = 10V, VGS = 0 VDG = 15V, ID = 200A TA = 125oC VDS = 0, V GS = 0, IG = 1A MAX V pA VDS = 0, IG = -1A VDS = 0, V GS = -30V VDS = 15V, ID = 1nA UNITS TEST CONDITIONS BVG1-G2 50 50 50 50 50 50 gfs 2000 7000 2000 7000 2000 7000 2000 7000 2000 7000 2000 7000 VDS = 10V, VGS = 0 f = 1kHz gos 20 20 20 20 20 20 S gfs 1000 2000 1000 2000 1000 2000 1000 2000 1000 2000 1000 2000 f = 1kHz VDG = 15V, ID = 200A gos 2.0 2.0 2.0 2.0 2.0 2.0 Ciss 8.0 8.0 8.0 8.0 8.0 8.0 pF f = 1MHz Crss 3.0 3.0 3.0 3.0 3.0 3.0 en 20 20 20 20 20 20 nV Hz dB VDS = 15V, VGS = 0 f = 10Hz (Note 6) CMRR | VGS1 -VGS2 | | VGS1 -VGS2 | T 95 10 95 10 95 15 90 20 40 VDG = 10 to 20V, ID = 200A (Note 5, 6) VDG = 10V, ID = 200A VDG = 10V, ID = 200A TA = -55oC TB = +25oC TC = +125oC mV 10 10 25 25 40 80 V/ oC NOTES: 1. Per transistor. 2. Approximately doubles for every 10oC increase in TA. 3. Pulse test duration = 300s; duty cycle 3%. 4. Measured at end points TA, TB, TC. VDD , VDD = 10V. 5. CMRR = 20 log10 | VGS1 -VGS2 | 6. For design reference only, not 100% tested. |
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